Process Hierarchy

If you are interested in this process, either by itself or as part of a longer processing sequence, please send us email at engineering@mems-exchange.org or call us at (703) 262-5368
on front
  Silicon DRIE with anti-footing SOI Down
on front
  1 Contact photolithography (Shipley 220)
  1.1 Dehydration bake
  1.2 HMDS prime
on front
  1.3 Photoresist coat (Shipley 220)
on front
  1.4 Photoresist softbake
on front
  1.5 Contact front-front alignment
on front
  1.6 Contact G-line exposure
on front
  1.7 Photoresist develop (Shipley 220)
on front
  2 Silicon DRIE with anti-footing SOI option
Materialsilicon
on front
  3 Microscope inspection
Process characteristics:
Depth
Depth of material removed by etch process
Depth*
Depth of material removed by etch process, must be 0 .. 100 µm
0 .. 100 µm
Perform handle wafer mounting
If mounting of device wafers on handle wafers is necessary for processing, select yes here.
Perform handle wafer mounting*
yes no
If mounting of device wafers on handle wafers is necessary for processing, select yes here.
Perform photolithography
Please select one of photolithography options listed here.
Perform photolithography*
Please select one of photolithography options listed here.
Perform stylus profilometry
Optional metrology step for depth <300um.
One measurement per wafer.
Perform stylus profilometry*
yes no
Optional metrology step for depth <300um. One measurement per wafer.
Aspect ratio 20
Batch size 1
Etch rate 2 µm/min
Etchant
Solutions and their concentrations.
 Bosch process
Mask materials
Materials that can be used to mask etching.
 silicon dioxide, OCG 825 35CS, Arch OiR 897-10i, silicon nitride
Material silicon
Min feature size 4 µm
Sides processed either
Wafer holder
Device that holds the wafers during processing.
 electrostatic chuck
Wafer size
Wafer size
Comments:
  • Low frequency bias, pulsed etch.
Attachments
[Thumbnail]profile_before_device_etch_3_SOI_wafer_.tif (768.6 KB, image/tiff)
attached by szabo (Attila Szabo) on 2008-03-19 17:36
last SOI test measuring point 3 /wafer: test SOI 1/
[Thumbnail]profile_before_device_etch_2_SOI_wafer_.tif (768.6 KB, image/tiff)
attached by szabo (Attila Szabo) on 2008-03-19 17:36
last SOI test measuring point 2 /wafer: test SOI 1/
[Thumbnail]profile_before_device_etch_1_SOI_wafer_.tif (768.6 KB, image/tiff)
attached by szabo (Attila Szabo) on 2008-03-19 17:36
last SOI test measuring point 1 /wafer: test SOI 1/
[Thumbnail]profile_before_device_etch_silicon_wafer_.tif (768.6 KB, image/tiff)
attached by szabo (Attila Szabo) on 2008-03-19 17:36
Last test on standard test wafer. Following tests were made on SOI wafer /wafer: test poly 2/